1. Field of the Invention
The present invention relates to a video disk player and, more particularly, to a video disk player equipped with a time axis correcting device using a memory.
2. Description of the Related Art
FIG. 1 illustrates a conventional video disk player equipped with a time axis correcting device using a memory. Referring to FIG. 1, a reproduction video signal including a time-axis varying component, read out from a video disk and demodulated, is sent to a write controller where it is quantized with a write clock WCK, which is generated in phase synchronism with this video signal. The quantized signal is sequentially written into a line memory 8 by a write clock WCK at a write address which is initialized by a write start signal RSTW. A read start signal RSTR for reading out data from the line memory 8 and a read clock RCK are prepared by a controller 9 on the basis of a fixed reference clock generated from a crystal oscillator or the like.
An error generator 10 produces an error signal corresponding to a constant difference between the write address and read address on the basis of the write start signal RSTW and read start signal RSTR; this error signal serves as a drive signal for a spindle driver 11. Accordingly, the speed of the spindle motor 2 is controlled so that the difference between the write address and read address is always constant. As a result, the average frequency of the write clock WCK becomes equal to that of the read clock RCK.
As described above, data writing to the line memory 8 is executed using the write clock WCK acquired in phase synchronism with the reproduction video signal, and data reading from the memory 8 is done using the read clock RCK generated on the basis of the fixed reference clock. This can eliminate the time-axis varying component contained in the reproduction video signal, thus providing a video output free from the time-axial variation. Further, the spindle servo is activated to make the difference between the write and read addresses always constant so that the relation between the write and read timings is always kept unchanged, yielding a correct reproduction image.
A field memory 12 is provided at the subsequent stage of the line memory 8 for temporary storage of digital data from the line memory 8. To properly control the write and read timings for the field memory 12 can provide various types of special reproduction modes, such as still picture reproduction, strobe reproduction and multi screening. Furthermore, it is possible to perform a digital Y-C separating function or a digital noise reducing function.
Since, on the other hands, the field memory is expensive, typical TV receivers are not generally equipped with such a memory and do not attain the above-mentioned special reproduction effects on modes as a consequence. Thus, an attempt can be made so as to exploit a memory of a video disc player by introducing thereinto a TV video signal or the like as an external video signal. Further, it is possible to attain Y and C components separation from the TV video signal or attain noise elimination by using the particular memory for the digital Y-C separating function or the digital noise reduction function.
If the conventional video disk player is modified to be able to selectively relay an external video signal to an A/D converter 5 and a sync separator 6, the write clock WCK acquired in phase synchronism with the video signal becomes substantially a fixed clock since this external video signal contains no time-axis varying component. As there exists an error in accuracy of the crystal oscillation between the write clock WCK and read clock RCK, the difference between the write address and read address gradually decreases or increases. If the input video signal to the line memory 8 is attained from the video disk 1, the write clock WCK can be controlled by the spindle servo, as described earlier. This control cannot however be executed to the external video signal. It is not therefore possible to maintain the difference between the write and read addresses of the line memory 8 constant, adjustments between write and read addresses are needed which are likely to cause double reading of the same data from the memory a blank state in which no data is readable from a certain area of the memory. It is desirable that the timings of the write start signal RSTW and read start signal RSTR, which respectively initialize the write and read addresses, have the relation shown in FIG. 2A such that the signal RSTR is generated at approximately the middle of the RSTW-generating duration. If the RSTR-generating duration becomes narrower as shown in FIG. 2B so that the read start signal RSTR is generated again before generation of the next write start signal RSTW, however, data in the duration A would be read twice. If the RSTR-generating duration becomes wider as shown in FIG. 2C so that the read start signal RSTR is not generated in the RSTW-generating duration A, the data in the duration A cannot be read out.
If such phenomenon which would result in double reading of the same data or the blank state where no data in the duration A cannot be read out occurs, the normal image reproduction from the external video signal cannot be carried out because of the usage of a memory.